> In pentode mode, it is normal for screen current to skyrocket when the grid is run positive.
No, actually when plate "bottoms", falls as low as it can for a given current.
Or more accurately: the cathode-G1-G2 interaction defines total cathode current. This splits between plate and G2. Because electrons have large velocity and G2 is open (and in 6L6, G2 sits in G1 shadow), normally most current flows to plate. But if plate voltage gets VERY low, it doesn't suck any more electrons. Cathode current is already happening; the excess finds its way to G2.
Put a 6L6 in a standard Champ. Put 1K 10W resistors in series with plate and screen. Rig a switch to break the plate connection. In normal operation (say B+ at 350V, G2 near there, G1 at zero, cathode at +20V, about 30mA plate 5mA G2), you find about 310V (350V-40V) on plate, maybe 345V on G2, due to drops in the 1K resistors. Now break the plate. Obviously it falls to zero. But all that "plate" current now has to exit through G2. G2 will fall from 345V to 315V, showing that it is getting 35mA, its normal 5mA plus the 30mA which was in the plate. (And will melt quickly! 35mA*315V= 11 Watts!! Measure fast!!)
If your loadline is high impedance, it will tend to "bottom below the knee", and G2 current will spike. This is of course when G1 is nearest zero; but for a very-very-high Z load, G1 does not have to be close to zero for this to happen.
This may be one reason old RCA sheets for 6L6 show quite low load impedances. With a very lo-Z load the plate does not reach low voltage, G2 current won't spike.
> I wonder if the same effect happens for the screen in UL.
UL is tricky. For one thing, when plate is low, G2 is also low, so it has less tendency to suck the excess when plate bottoms. And if it does, its load connection makes G2 sag more, limiting its suckage. Some argue that this G2 current contributes to output; the leverage is so bad (40% tap is about 6 times off the optimum load) that I doubt it adds much.