Perhaps not all on the same page. I am looking at the sniplet attached below. Has 2.2Meg+2.2Meg divider.
> why 1/2 B+ V divider?
That was my question. I am advocating 1/4 B+ divider.
As do you: "i used 3.3M and 1.2M for fixed bias V divider" (0.2667)
> video capture - link below:
Sorry: can NOT read that in dropbox's viewer, even full-screened (128081024). When downloaded, the dl fails multiple times. Eventually I get the whole file, but whatever viewer Win7 picked (it needs a good smack-down) will not zoom larger (OR smaller?). I get that you have two variant cathodynes, one with no explicit bias (except Zener leakage), one with a good divider. There's dancing sines on the other side, but too small (and fast) to judge peak output or bias-stabilization. I can't read any DC voltage values.
> time to bias stabilization is proportional to the values of R6-R7 and C2-C3
Audio can start any time and at any size. SPICE normally computes an infinite-time DC bias before transient sim starts. Seems to me the bias should be stable already. Maybe not getting (seeing) what you are saying?
> printer2 has zener bootstrap bias working on his breadboard.
I see that Zener as protection, not boot-strap, not bias.
Seems to me that with conventional (positive gate) MOSFET, the idle current will be zero.
Yes, with LARGE signal the Zener clamps gate-source at -0.6V to +12V, average +6V, which gets the MOSFET conducting. And the coupling cap will integrate charge, perhaps to a point that the stage is just-clipped. But does it play sweetly?
The 47K or 10K concerns me less. 10K gives 16% higher peak output, yes. But either way makes several times more peak output than usual self-bias audio tubes need.